![]() ![]() ![]() You can then move onto modifying the GHRD or working with your own FPGA design, following the steps outlined here. It is strongly recommended that you first test the working eMMC image provided here in order to become familiar with the the required process of booting the SOM from network, updating the eMMC, and demonstrating the features highlighted in the next section below. The Yocto build process can perform multiple steps of the build process to generate a single bootable image file for the Achilles eMMC boot flash. The GSRD (Golden System Reference Design) example presented here for the Achilles SOM consists of a Hardware component and a Software component.Įach color-coded section corresponds to a tab (or button) at the top of this page where you will find instructions for each step in the process. ![]() The data available here is provided As-Is without any warranty or support. The board support package includes full documentation and a suite of reference designs to quickly enable the FPGA development process. With our intuitive software GUI environment, users can power-up the board and demonstrate functionality of the major interfaces in just a few minutes. The SOM also features industry standard FMC connectors to allow for easy integration of additional connectivity, video interfaces, data converters, and many other options available through FMC daughter cards.
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